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ISO2-CMOS ST-BUSTM FAMILY MT8971B/72B Digital Subscriber Interface Circuit Digital Network Interface Circuit
Features
* * * * * * * * * Full duplex transmission over a single twisted pair Selectable 80 or 160 kbit/s line rate Adaptive echo cancellation Up to 3km (8971B) and 4 km (8972B) ISDN compatible (2B+D) data format Transparent modem capability Frame synchronization and clock extraction MITEL ST-BUS compatible Low power (typically 50 mW), single 5V supply
ISSUE 7
May 1995
Applications
* * * *
d de enign Description mmes /MT8971B (DSIC) and MT8972B (DNIC) are o D The 72 devices capable of providing high multi-function ec ew 171 full duplex digital transmission up to 160 t Rr N T9 speed,over a twisted wire pair. They use adaptive kbit/s oo techniques transfer data in N f e M echo-cancelling compatible to and ISDN basic rate. (2B+D) format the Several modes of operation allow an easy interface Se to digital telecommunication networks including use
as a high speed limited distance modem with data rates up to 160 kbit/s. Both devices function identically but with the DSIC having a shorter maximum loop reach specification. The generic "DNIC" will be used to reference both devices unless otherwise noted. The MT8971B/72B is fabricated in Mitel's ISO2CMOS process.
Ordering Information MT8971BE 22 Pin Plastic DIP MT8972BE 22 Pin Plastic DIP MT8972BC 22 Pin Ceramic DIP MT8971BP 28 Pin PLCC MT8972BP 28 Pin PLCC -40C to +85C
Digital subscriber lines High speed data transmission over twisted wires Digital PABX line cards and telephone sets 80 or 160 kbit/s single chip modem
DSTi/Di CDSTi/ CDi
Transmit Interface
Prescrambler
Scrambler
Differentially Encoded Biphase Transmitter
Transmit Filter & Line Driver
LOUT
F0/CLD C4/TCK F0o/RCK MS0 MS1 MS2 RegC
Control Register
Transmit Timing
VBias Address Echo Canceller Error Signal Echo Estimate -- DPLL MUX
LOUT DIS
Master Clock Phase Locked Transmit/ Clock Receive Timing & Control Sync Detect Status Receive
Precan
+
Receive Filter
-1 +2 LIN
OSC2 DSTo/Do CDSTo/ CDo Receive Interface DePrescrambler Descrambler Differentially Encoded Biphase Receiver
OSC1
VDD
VSS
VBias VRef
Figure 1 - Functional Block Diagram
9-113
MT8971B/72B
Notes:
9-114
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TECHNICAL DOCUMENTATION - NOT FOR RESALE


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